HPC has become a mature market
on the Exascale Race
As the HPC community hurtles toward the exascale era, it’s good to pause and reflect. Here are a few thoughts…
The DOE CORAL procurement signaled
that extreme-performance supercomputers
from the U.S., Japan, China and Europe
should reach the 100-300PF range in 2017-
2018. That’s well short of DOE’s erstwhile
stretch goal of deploying a trim, energy-ef-ficient peak exaflop system in 2018 or so,
but still impressive. It would appear to leave
room for one more pre-exascale generation
before full-exascale machines begin dotting
the global landscape in the 2020-2024 era.
An exaflop is an arbitrary milestone, a
nice round figure with the kind of symbolic
lure the four-minute mile once held. And as
NERSC Director Horst Simon pointed out
many moons ago, there are three temporal
stages to these computing milestones that
have occurred about once a decade. First
will come peak exaflop performance, then
a Linpack/TOP500 exaflop, and finally
the one that counts most but will likely be
celebrated least: sustained exaflop performance on a full, challenging 64-bit user
A peak exascale system is merely an
“exasize” computer, to cite the term Chinese
experts used in an SC13 conference talk. It’s
a show dog without a repertoire of tricks.
A system that completes a Linpack run at
exascale shows at least that a major fraction
of the system can be engaged to tackle a
dense system of linear equations. The path
to the third stage — sustained exaflop per-
formance on challenging user applications
— is where many of the biggest hurdles lie.
Prominent among these, as is well-known,
are scaling the software ecosystem, providing enough reliability and resiliency to finish
exa-jobs, and supplying enough IO to keep
the heterogeneous processing elements busy.
These are the same challenges advanced
users face today, only more so.
The IO challenge is particularly nasty. In
recent decades, HPC systems have become
extremely compute-centric (“f/lopsided”).
This increasing imbalance has aggravated the memory wall and narrowed the
breadth-of-applicability for each succeeding
generation of high-end supercomputers,
especially for data-intensive simulation
and the growing importance of advanced
analytics. Fortunately, strategies are under
way to alleviate (but not fix) this issue,
including more capable interconnect fabrics,
burst buffers and NVRAM, tighter linkages between CPUs and accelerators, clever
data reduction methods, and more besides.
But no one should expect supercomputers
to return to the more balanced status of
yesteryear. IDC vendor studies show that
the basic architecture of HPC systems is
unlikely to change in the next five to seven
years, although configurations and some
components will shift.
Not long ago, a fundamental premise underlying advanced supercomputer
development was that evolutionary market
forces were too slow and governments
needed to stimulate revolutionary progress.
The idea was that the government would
do the heavy lifting to pave the way, and
the mainstream HPC market would follow